FPGA Implementation of Digital Modulators for Underwater Communications

This work presents field programmable gate array (FPGA) hardware implementation results for an ongoing research work pertaining to the design and development of a modeling and simulation framework for a multiple input multiple output (MIMO) underwater acoustic (UWA) communications system. The work is using signal processing concepts in a unique manner to formulate algorithms for implementing digital modulation systems in a discrete data communications environment. This unique manner centers on the use of a signal algebra operator approach to describe the encoding process, from a discrete message source to the input of a digital modulator, as a finite dimensional signal mapping process in a linear signal space. A digital modulator, in essence, is also treated in this work as a signal operator mapping which acts on a symbolic information signal, the output of a message encoder, and it produces a transmission signal or waveform suitable for the communication medium or channel, which in this case is an underwater acoustic channel exhibiting dispersion in time and frequency at the same time (doubly dispersive channel) due to time delay fading and Doppler spreading.
The digital modulators presented in this work were implemented in the Xilinx’s ISE (integrated software environment) synthesis and analysis software design tool. The ISE tool interacted with MATLAB through the Xilinx’s System Generator plug-in to MATLAB’s Simulink. This allowed for the iconic programming of digital modulation algorithms using Simulink as well as automatic generation of optimized Hardware Description Language (HDL) code for the FPGAs.